HeteroGen: Automatic Synthesis of Heterogeneous Cache Coherence Protocols (2023)
Attributed to:
Dijkstra's Pipe: Timing-Secure Processors by Design
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/mm.2023.3274993
Publication URI: http://dx.doi.org/10.1109/mm.2023.3274993
Type: Journal Article/Review
Parent Publication: IEEE Micro
Issue: 4