Lateral Tunnel Epitaxy of GaAs in Lithographically Defined Cavities on 220 nm Silicon-on-Insulator (2023)
Attributed to:
Tunnel epitaxy: building a buffer-less III-V-on-insulator (XOI) platform for on-chip light sources
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1021/acs.cgd.3c00633
Publication URI: http://dx.doi.org/10.1021/acs.cgd.3c00633
Type: Journal Article/Review
Parent Publication: Crystal Growth & Design
Issue: 11