Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA (2023)

First Author: Rodriguez-Canal G

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1145/3624062.3624543

Publication URI: http://dx.doi.org/10.1145/3624062.3624543

Type: Conference/Paper/Proceeding/Abstract