Posets with interfaces as a model for concurrency (2022)

First Author: Fahrenberg U

Attributed to: Verifiably Correct Transactional Memory. funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1016/j.ic.2022.104914

Publication URI: http://dx.doi.org/10.1016/j.ic.2022.104914

Type: Journal Article/Review

Parent Publication: Information and Computation

ISSN: 0890-5401