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Charge dissipation layer optimisation for nano-scale electron-beam lithography pattern definition onto diamond (2012)

First Author: Greer A

Attributed to: Ultra short gate length diamond FETs for high power/high frequency applications funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1016/j.diamond.2012.07.003

Publication URI: http://dx.doi.org/10.1016/j.diamond.2012.07.003

Type: Journal Article/Review

Parent Publication: Diamond and Related Materials