Nanoanalysis of a sub-nanometre reaction layer in a metal inserted high-k gate stack (2011)

First Author: Craven A

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1016/j.mee.2011.03.084

Publication URI: http://dx.doi.org/10.1016/j.mee.2011.03.084

Type: Journal Article/Review

Parent Publication: Microelectronic Engineering

Issue: 7