Fortran High-Level Synthesis: Reducing the Barriers to Accelerating HPC Codes on FPGAs (2023)
Attributed to:
Efficient Cross-Domain DSL Development for Exascale
funded by
SPF
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/fpl60245.2023.00010
Publication URI: http://dx.doi.org/10.1109/fpl60245.2023.00010
Type: Conference/Paper/Proceeding/Abstract