Customizable FPGA-based Accelerator for Binarized Graph Neural Networks (2022)
Attributed to:
DART: Design Accelerators by Regulating Transformations
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/iscas48785.2022.9937817
Publication URI: http://dx.doi.org/10.1109/iscas48785.2022.9937817
Type: Conference/Paper/Proceeding/Abstract
ISSN: 02714310