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Low hardware consumption, resolution-configurable Gray code oscillator time-to-digital converters implemented in 16nm, 20nm and 28nm FPGAs (2022)

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.48550/arxiv.2201.09670

Publication URI: https://arxiv.org/abs/2201.09670

Type: Preprint