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Empirical DC compact model for source-gated transistors using TCAD simulation data (2023)

First Author: Golec P

Attributed to: A new low-complexity paradigm for analogue computation and hardware learning funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/laedc58183.2023.10209131

Publication URI: http://dx.doi.org/10.1109/laedc58183.2023.10209131

Type: Conference/Paper/Proceeding/Abstract