📣 Help Shape the Future of UKRI's Gateway to Research (GtR)

We're improving UKRI's Gateway to Research and are seeking your input! If you would be interested in being interviewed about the improvements we're making and to have your say about how we can make GtR more user-friendly, impactful, and effective for the Research and Innovation community, please email gateway@ukri.org.

In-Ga-Zn-O Source-Gated Transistors with 3nm SiO 2 Tunnel Layer on a Flexible Polyimide Substrate (2023)

First Author: Corsino D

Attributed to: A new low-complexity paradigm for analogue computation and hardware learning funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/ifetc57334.2023.10254818

Publication URI: http://dx.doi.org/10.1109/ifetc57334.2023.10254818

Type: Conference/Paper/Proceeding/Abstract