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Power, Performance and Area Optimization of Parallel Load Counters through Logic Minimization and TSPC-FF Utilization (2023)

First Author: Humood K

Attributed to: Functional Oxide Reconfigurable Technologies (FORTE): A Programme Grant funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/icecs58634.2023.10382888

Publication URI: http://dx.doi.org/10.1109/icecs58634.2023.10382888

Type: Conference/Paper/Proceeding/Abstract