Improving Performance by Reducing Aborts in Hardware Transactional Memory

First Author: Ansari M

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1007/978-3-642-11515-8_5

Publication URI: http://dx.doi.org/10.1007/978-3-642-11515-8_5

Type: Book Chapter

Book Title: High Performance Embedded Architectures and Compilers (2010)

Page Reference: 35-49

ISBN: 978-3-642-11514-1

ISSN: 1773-0155