Performance projections and design optimization of planar double gate SOI MOSFETs for logic technology applications (2008)

First Author: Kranti A

Attributed to: Novel Device, Circuit and System Design Concepts utilising Innovative Nanoscale CMOS Devices for Low Voltage Analog/RF Applications funded by EPSRC

No abstract provided

Type: Journal Article/Review

Parent Publication: Semiconductor Science and Technology

Issue: 4