An admission control system for QoS provision on a best-effort GALS interconnect (2008)
Attributed to:
A scalable chip multiprocessor for large-scale neural simulation
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/acsd.2008.4574612
Publication URI: http://dx.doi.org/10.1109/acsd.2008.4574612
Type: Conference/Paper/Proceeding/Abstract
ISBN: 978-1-4244-1838-1