Automated Synthesis of Instruction Codes in the Context of Micro-architecture Design (2010)
Attributed to:
VERification-Driven Asynchronous Design (VERDAD)
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/acsd.2010.30
Publication URI: http://dx.doi.org/10.1109/acsd.2010.30
Type: Conference/Paper/Proceeding/Abstract
ISBN: 978-1-4244-7266-6