On Dual-Rail Control Logic for Enhanced Circuit Robustness (2012)

First Author: Mokhov A
Attributed to:  VERification-Driven Asynchronous Design (VERDAD) funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/acsd.2012.17

Publication URI: http://dx.doi.org/10.1109/acsd.2012.17

Type: Conference/Paper/Proceeding/Abstract

ISBN: 978-1-4673-1687-3