An Asynchronous Fully Digital Delay Locked Loop for DDR SDRAM Data Recovery (2012)
Attributed to:
Biologically-Inspired Massively Parallel Architectures - computing beyond a million processors
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/async.2012.18
Publication URI: http://dx.doi.org/10.1109/async.2012.18
Type: Conference/Paper/Proceeding/Abstract
ISBN: 978-1-4673-1360-5