Computation reduction for statistical analysis of the effect of nano-CMOS variability on asynchronous circuits (2010)
Attributed to:
Meeting the design challenges of the nano-CMOS electronics
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/ddecs.2010.5491795
Publication URI: http://dx.doi.org/10.1109/ddecs.2010.5491795
Type: Conference/Paper/Proceeding/Abstract
ISBN: 978-1-4244-6612-2