Concurrently optimizing FPGA architecture parameters and transistor sizing: Implications for FPGA design (2009)

First Author: Smith A

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/fpt.2009.5377647

Publication URI: http://dx.doi.org/10.1109/fpt.2009.5377647

Type: Conference/Paper/Proceeding/Abstract

ISBN: 978-1-4244-4375-8