Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator (2010)

First Author: Bohm I
Attributed to:  Automated Synthesis of High Performance Low Power Embedded Systems funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/icsamos.2010.5642102

Publication URI: http://dx.doi.org/10.1109/icsamos.2010.5642102

Type: Conference/Paper/Proceeding/Abstract

ISBN: 978-1-4244-7936-8