A design methodology for maximizing the voltage gain of strained Si MOSFETs using the thickness of the silicon-germanium strain relaxed buffer as a design parameter (2009)
Attributed to:
Platform: Strained Si / SiGe: Materials, Technology and Design
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/isdrs.2009.5378304
Publication URI: http://dx.doi.org/10.1109/isdrs.2009.5378304
Type: Conference/Paper/Proceeding/Abstract
ISBN: 978-1-4244-6030-4