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Dynamic task remapping for power and latency performance improvement in priority-based non-preemptive Networks On Chip (2013)

First Author: Harbin J

Attributed to: LowPowNoC - Evaluation and reduction of power dissipation in multicore systems based on Networks-on-Chip funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/recosoc.2013.6581526

Publication URI: http://dx.doi.org/10.1109/recosoc.2013.6581526

Type: Conference/Paper/Proceeding/Abstract

ISBN: 978-1-4673-6180-4