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Design and security evaluation of balanced 1-of- n circuits (2012)

First Author: Burns F

Attributed to: Secure Design Flow funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1049/iet-cdt.2010.0042

Publication URI: http://dx.doi.org/10.1049/iet-cdt.2010.0042

Type: Journal Article/Review

Parent Publication: IET Computers & Digital Techniques

Issue: 2