Memory Reduction Methodology for Distributed-Arithmetic-Based DWT/IDWT Exploiting Data Symmetry (2009)
Attributed to:
Electronics Design
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tcsii.2009.2015386
Publication URI: http://dx.doi.org/10.1109/tcsii.2009.2015386
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Circuits and Systems II: Express Briefs
Issue: 4