Risk assessment and mitigation techniques for autonomous systems in safety critical environment
Lead Research Organisation:
University of Liverpool
Department Name: Electrical Engineering and Electronics
Abstract
There is global consensus on the importance of autonomous systems in a number of application domains including transportation (driverless cars), medical and industrial use. This project will concentrate on autonomous vehicles; however research findings may also be applicable to other application domains. Autonomous vehicles are widely accepted as a promising technology that offers significant potential for reducing transportation cost while improving passenger's safety and their experience. However, full utilisation of such vehicles is threatened by challenges posed by the robustness of the underlying hardware that realise such systems. This project will focus on one of the most important component of autonomous vehicles that is specialised microelectronic devices and embedded systems. These devices and systems support a wide variety of functions, including engine, vehicle control, safety (braking and airbags), direction and infotainment.
Despite potential advantages, one major obstacle to their widespread proliferation is insufficient understanding of reliability and testability challenges. A malfunction in any microelectronic device or embedded system can have catastrophic repercussions on users' safety. Due to CMOS miniaturization and higher number of on-board microelectronic devices and systems, new challenges have emerged that require research input. This is a highly novel research as there are only few available solutions, and demand for faster, cheaper, low energy-consuming, and more reliable systems is on the rise.
Gartner (market analysis research firm) recently predicted that the global market size of automotive chips would grow annually by 7.1% until 2020; this size will increase from $32.3 billion in 2016 to $42.4 billion by 2020. Note that the overall semiconductor market is expected to grow at 3.7% annually during this period. Another study jointly published by the UK government's department for business, energy and industrial strategy and Innovate (UK) estimated that the market size of driverless cars will be about $83.4 billion (£63 billion) by 2035.
This PhD project will address key reliability and testability challenges and deliver robust fault tolerant architectures and online test methods for detecting, preventing and controlling hardware faults, including rigorous validation to quantify and improve reliability and testability. Particular emphasis will be on the following two outcomes: cost-effectiveness of proposed solutions and ease of adaptation by the wider electronic design community.
Despite potential advantages, one major obstacle to their widespread proliferation is insufficient understanding of reliability and testability challenges. A malfunction in any microelectronic device or embedded system can have catastrophic repercussions on users' safety. Due to CMOS miniaturization and higher number of on-board microelectronic devices and systems, new challenges have emerged that require research input. This is a highly novel research as there are only few available solutions, and demand for faster, cheaper, low energy-consuming, and more reliable systems is on the rise.
Gartner (market analysis research firm) recently predicted that the global market size of automotive chips would grow annually by 7.1% until 2020; this size will increase from $32.3 billion in 2016 to $42.4 billion by 2020. Note that the overall semiconductor market is expected to grow at 3.7% annually during this period. Another study jointly published by the UK government's department for business, energy and industrial strategy and Innovate (UK) estimated that the market size of driverless cars will be about $83.4 billion (£63 billion) by 2035.
This PhD project will address key reliability and testability challenges and deliver robust fault tolerant architectures and online test methods for detecting, preventing and controlling hardware faults, including rigorous validation to quantify and improve reliability and testability. Particular emphasis will be on the following two outcomes: cost-effectiveness of proposed solutions and ease of adaptation by the wider electronic design community.
Organisations
People |
ORCID iD |
Syed Saqib Khursheed (Primary Supervisor) | |
Anuraag Narang (Student) |
Studentship Projects
Project Reference | Relationship | Related To | Start | End | Student Name |
---|---|---|---|---|---|
EP/N509693/1 | 01/10/2016 | 30/09/2021 | |||
2111866 | Studentship | EP/N509693/1 | 01/09/2018 | 30/04/2022 | Anuraag Narang |
EP/R513271/1 | 01/10/2018 | 30/09/2023 | |||
2111866 | Studentship | EP/R513271/1 | 01/09/2018 | 30/04/2022 | Anuraag Narang |