Functional Oxide Reconfigurable Technologies (FORTE): A Programme Grant

Lead Research Organisation: University of Southampton
Department Name: Optoelectronics Research Centre (ORC)

Abstract

Our vision is to rejuvenate modern electronics by developing and enabling a new approach to electronic systems where reconfigurability, scalability, operational flexibility/resilience, power efficiency and cost-effectiveness are combined. This vision will be delivered by breaking out of the large, but comprehensively explored realm of CMOS technology upon which virtually all modern electronics are based; consumer and non-consumer alike.

Introducing novel nanoelectronic components never before used in the technology we all carry around in our phones will introduce new capabilities that have thus far been unattainable due to the limitations of current hardware technology. The resulting improved capability of engineers to squeeze more computational power in ever smaller areas at ever lower power costs will unlock possibilities such as: a) truly pervasive Internet-of-Things computing where minute sensors consuming nearly zero power monitor the world around us and inform our choices, b) truly smart implants that within extremely limited power and size budgets can not only interface with the brain, but also process that data in a meaningful way and send the results either onwards to e.g. a doctor, or even feed it back into the brain for further processing, c) radiation-resistant electronics to be deployed in satellites and aeroplanes, civilian and military and improve communication reliability while driving down maintenance costs.

In building this vision, our project will deliver a series of scientific and commercial objectives: i) Developing the foundations of nanoelectronic component (memristive) technologies to the point where it becomes a commercially available option for the general industrial designer. ii) Setting up a fully supported (models, tools, design rules etc.), end-to-end design infrastructure so that anyone with access to industry standard software used for electronics design today may utilise memristive technology in their design. iii) Introduce a new design paradigm where memristive technologies are intimately integrated with traditional analogue and digital circuitry in order to deliver performance unattainable by any in isolation. This includes designing primitive hardware modules that can act as building-blocks for higher level designs, allowing engineers to construct large-scale systems without worrying about the intricate details of memristor operation. iv) Actively foster a community of users, encouraged to explore potential commercial impact and further scientific development stemming from our work whilst feeding back into the project through e.g. collaborations. v) Start early by beginning to commercialise the most mature aspects of the proposed research as soon as possible in order to create jobs in the UK. Vast translational opportunities exist via: a) The direct commercialisation of project outcomes, specifically developed applications (prove in lab, then obtain venture capital funding and commercialise), b) The generation of novel electronic designs (IP / design bureau model; making the UK a global design centre for memristive technology-based electronics) and c) Selling tools developed to help accelerate the project (instrumentation, CAD and supporting software).

Our team (academic and industry) is ideally placed for delivering this disruptive vision that will allow our society to efficiently expand the operational envelope of electronics, enabling its use in formidable environments as well as reuse or re-purpose electronics affordably.

Planned Impact

FORTE is planned for generating impact in: a) knowledge, b) economy, c) society and d) education, delivered over the short (S, <5 years), medium (M, 5-10y) and long (L, 10y+) -terms.

Knowledge: We will introduce a radically innovative way of implementing reconfigurable hardware, based on new ideas from the field of functional oxides (S/M). This will create a very valuable UK-based network that can lead on developing of industry-ready reconfigurable designs (S/M). The network will rely on participant expertise that will be considerably strengthened by this project in a number of areas: i) Understanding of opportunities for reconfiguration - through the interplay between materials, devices and circuit design (S). The partnership with our industrial stakeholders offers unique opportunities for fundamental discoveries, enabling knowledge transfer and amalgamating new knowledge generated through our new hardware set-ups and applications (S/M). ii) Pushing the performance limits of memory devices beyond current state-of-art as well as engineering them for use in commercially available systems (S/M), iii) Developing novel design concepts (RP3-4) and paradigms (RP5) for providing unprecedented application opportunities (S/M), iv) Developing tools for massively accelerating the electrical characterisation of memory technologies (ArC) (S) and v) Forging the link between CMOS and memristive technologies, with advances in circuit/system design (S/M).
Overall, we will be developing end-to-end infrastructure from a range of methods, models, devices, circuits, technologies, design methodologies and practical applications. Our trans-disciplinary approach provides an ideal framework for establishing a wide knowledge-base, covering both fundamental and applied science, that will be useful for equipping young scientists with unique skillsets (PhDs and PDRAs) and creating the necessary critical mass to further develop these disruptive technologies (S/M). We will also translate this breadth of research developments for reshaping taught modules; first within our consortium's host institutions and then more broadly (S).
Economy: Commercial impact is expected to be delivered via: i) Commercialisation of the research tools that will be developed (described above), thus growing the SME participants (S). ii) Generation of reliable ReRAM device models for use with standard industrial CAD software tools (Cadence) (S), which will improve technological capability (ams AG) (M). iii) Creation of a new field of industrial activity, namely reconfigurable hardware platforms (M/L). We aim attracting substantial amounts of inward investment for first creating and then dominating the global market for 'alternative reconfigurable paradigms'. This combined academic/industrial effort will leap-frog current research. This is realistically achievable by delivering convincing demonstrators (RP6) whilst simultaneously achieving sufficient maturation of the underlying technologies (RP1-2).
Society: Societal impact will be delivered through novel applications and policy shaping. Policies will be influenced as our results become available, through the PI's membership of the internationally highly influential ITRS (SRC) body (S). We aspire delivering a platform technology (RP1-2), which will extend support to numerous applications (RP3-6) to be pursued post-project, many by consortium participants themselves (M/L). These will include: i) Healthcare, notably ReRAM-based intelligent neural interfaces (with Galvani Bio/GSK), ii) RADAR applications (THALES), iii) ReRAM for pervasive sensing and safety (LRG), iii) embedded platforms for IoT (ARM, Maxeler, NXP). Great benefits are also anticipated in the use of the proposed technology in autonomous agents that continuously process large number of data and are often constraint in terms of available resources but also their physical location that in some cases entails being embedded in harsh or inaccessible environments.

Publications

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Messaris I (2018) A Data-Driven Verilog-A ReRAM Model in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

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Michalas L (2018) Electrical characteristics of interfacial barriers at metal-TiO 2 contacts in Journal of Physics D: Applied Physics

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Gupta I (2019) Spike sorting using non-volatile metal-oxide memristors. in Faraday discussions

 
Description We have invented a novel design circuit paradigm that fuses analogue and digital technologies. While the well-known mixed-signal paradigm fuses the analogue and digital worlds at signal level - the underlying technologies remain separate. Throughout this work, we demonstrated for the first time how analogue memristors can be fused with digital circuits for enabling energy efficient implementations of analogue reconfigurable gates, essentially introducing a radical new circuit design paradigm.
Exploitation Route This pushes further the discovery envelope for integrated circuits - beyond the current scaling constraints (Moore's law hitting the nanoscale floor) and is thus anticipated that it will allow circuit designers to provide powerful analogue computation at competitive power-savings.
Sectors Aerospace, Defence and Marine,Electronics,Healthcare