Atomic Layer Interface Engineering for Nanoelectronics (ALIEN): Contacts

Lead Research Organisation: Newcastle University
Department Name: Electrical, Electronic & Computer Eng


This research considers the intriguing prospect of using insulators to improve electrical conductivity. The revolution in electronics over the last 50 years is due in large part to semiconductors, including silicon for microchips, III-V semiconductors for optical components such as lasers or LEDs and organic semiconductors for large area displays. Electrical contact from a metal to these semiconductors is fundamental. Conventional theory, developed by Schottky and Mott in the 1930's and still taught today, says that the potential energy barrier that electrons encounter at the junction between a metal and a semiconductor is simply the difference in energy needed to take electrons from each material (the workfunction difference). Thus by a suitable choice of semiconductor and metal, the energy to remove electrons from either will be the same and there should be no barrier to current between them. But experience shows this is generally not the case, particularly for semiconductors of commercial interest. In fact, the potential energy barrier (the Schottky barrier) tends to be about the same for all metal contacts to any given semiconductor. The effect is called Fermi level pinning and arises because electrons from the metal spill into the semiconductor at the junction. The barrier gives rise to an electrical resistance, which may be different depending on the direction of current (a Schottky diode). The resistance can belowered by making the contact surface area large and/or by increasing doping in the semiconductor so that the potential energy barrier becomes thin enough that electrons can easily tunnel through. But this is not always possible or sufficient.
A novel approach to improving the electrical contact is to add a thin insulator in between the metal and the semiconductor. The effect is to prevent electrons spilling from the metal into the semiconductor and so prevent Fermi level pinning. The correct choice of metal and semiconductor will allow a reduction in potential energy barrier height, as Schottky-Mott theory suggests. A complication is that the insulator itself may block current and so needs to be thin (~ nm scale). This research will deposit nm scale insulating layers between semiconductors and metals to improve conduction across the contact. A range of experimental techniques will be used to measure the change in electrical properties brought about by the thin insulator films and the film thickness will be optimised for a range of important semiconductors. Modelling of the atomic structure of the metal, insulator and semiconductor will help to unravel to competing factors that are at play in improving current flow. The research will also address integrating this type of contact into a manufactured device, 3D structures and to test its applicability to organic semiconductors.

Planned Impact

The UK electronics industry is worth approximately £23 billion a year and is the fifth largest in the world in terms of production. Because this research impacts on such a major sector of the UK economy, its value is considerable. Companies involved in semiconductor technologies (Si, III-Vs, organics) and their supply chain will gain competitive advantage. Materials companies and equipment vendors will see new market opportunities for nm scale dielectrics that we will have shown to reduce contact resistance. They can showcase this new application of their tools. There is also an opportunity to licence process recipes. The characterisation data generated can be used by them to demonstrate quality to customers. The proof of concept for improving electrical contact using dielectric thin films will reduce risk in the development and manufacture of products using this innovation. Companies designing and manufacturing semiconductor technologies will see the impact in their products as this new contact technology is introduced, with improved component properties and a smaller footprint of constituent devices, impacting design.
Research on thin film integration represents part of a portfolio of technologies which make up the "more than Moore" agenda of including mixed technologies within silicon technology. While the UK does not at present have state of the art silicon manufacturing, research of this kind will be attractive to inward investors. UK based companies can partner with overseas semiconductor foundries for the supply of part-processed wafers, which can be completed by integrating a variety of mixed technologies to create IP intensive products of high added value. This may be particularly appropriate for partnering within the EU where it may make economic sense to share expensive semiconductor foundries.
Materials with XPS-validated depth-profiles, having nanometre-scale variation in composition, are urgently needed. These are particularly valuable as Reference Materials (RMs) for comparisons between characterisation techniques in which the UK is strong: RBS, PIXE, SIMS, Auger, ellipsometry, LEIS and MEIS. Cross validation could then lead to some milestone Certified Reference Materials (CRMs) that will prove to be a step forward in the analysis of shallow depth profiles. The National Physical Laboratory (NPL) can validate them metrologically, distributing them nationally and internationally at the appropriate time.
The ability to make good electrical contact at nm scale dimensions will lead to many new opportunities for innovation. Exploitation of the electrical and electro-mechanical properties of many semiconductor nanostructures, made possible with this new contact technology, may lead to the spin out of new companies that wish to exploit new innovations enabled through this research.
The RA's trained will have the opportunity to develop excellent analytical, research and communications skills. Such people have previously gone on to work as permanent academic staff, in industry, in finance and in government research labs. The project will offer other RA's and PG students an opportunity to benefit from working on closely related topics in the area and it is anticipated that this will boost the activity to the benefit of all.
The use of an insulator to improve electrical conduction may be used to advantage in raising public awareness of science and engineering. The media are always looking for new ways to attract public interest. The concepts of conductor and insulator are well known to the general public and this research challenges "common sense" because it is exploiting quantum effects at nm dimensions, which makes it fascinating.


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Description Contact resistance can be engineered using nm scale interface layers. For example AlOx interface layer on both n and p sililcon. For Ge we found improved contacts (ohmic n- and p-Ge using the same metalisation) using island metal films.
Exploitation Route commercial exploitation in semiconductor industry. Research exploitation in nanoelectronics
Sectors Electronics

Description citations suggest use by other academic researchers
First Year Of Impact 2015
Sector Electronics
Impact Types Cultural