High speed IC Design with novel dielectrics for 5G infrastructure and precision electronics

Lead Research Organisation: University of Southampton
Department Name: Sch of Electronics and Computer Sci

Abstract

One of the undisputed trends in the IC industry is the scaling of the fabrication geometries. Besides the clear benefits of lower power consumption, higher speed and higher integration, this trend present new challenges to designers. One of these trade-offs is the usage of back end of line (BEOL) capacitors with low-k dielectrics. The new dielectric allows a higher capacitance per unit area but comes at the cost of increased dielectric absorption and random mismatch. This project will explore in-depth analysis of the capacitor non- idealities limiting the performance of the state of art numerical converters. The main areas of investigation focus on the capacitor mismatch drift and dielectric absorption. Assisted by a group of world leading data converter specialists and academics, you will gather experience in circuit design, layout, characterisation, data analysis and modelling

Publications

10 25 50

Studentship Projects

Project Reference Relationship Related To Start End Student Name
EP/T517859/1 30/09/2020 29/09/2025
2621487 Studentship EP/T517859/1 30/09/2021 30/03/2025 William Webb