Fast characterisation of silicon qubit device performance at scale

Silicon-based approaches to quantum information processors offer advantages such as high qubit density, record qubit coherence lifetimes for the solid state, and the ability to leverage the advanced nanofabrication methods of CMOS technologies. One of the challenges in scaling this quantum computing hardware is handling variability between nominally identical qubit devices. This PhD project will focus on designing multiplexed device architectures, rapid characterisation techniques and automated parameter extraction routines to evaluate silicon qubit performance at scale in short timescales (>100 devices). A successful PhD will result in measurement protocols that can extract qubit properties such as tunnel coupling, valley splitting, spin relaxation and coherence time and perform statistical characterisation of these parameters to assess points of device manufacturing improvement.