DART: Design Accelerators by Regulating Transformations

Lead Research Organisation: Imperial College London
Department Name: Computing

Abstract

The DART project aims to pioneer a ground-breaking capability to enhance the performance and energy efficiency of reconfigurable hardware accelerators for next-generation computing systems. This capability will be achieved by a novel foundation for a transformation engine based on heterogeneous graphs for design optimisation and diagnosis. While hardware designers are familiar with transformations by Boolean algebra, the proposed research promotes a design-by-transformation style by providing, for the first time, tools which facilitate experimentation with design transformations and their regulation by meta-programming. These tools will cover design space exploration based on machine learning, and end-to-end tool chains mapping designs captured in multiple source languages to heterogeneous reconfigurable devices targeting cloud computing, Internet-of-Things and supercomputing. The proposed approach will be evaluated through a variety of benchmarks involving hardware acceleration, and through codifying strategies for automating the search of neural architectures for hardware implementation with both high accuracy and high efficiency.

Publications

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Que Z (2024) LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics in ACM Transactions on Embedded Computing Systems

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Guo C (2024) FPGA-Accelerated Sim-to-Real Control Policy Learning for Robotic Arms in IEEE Transactions on Circuits and Systems II: Express Briefs

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Fan H (2023) When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA

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Sahebi A (2023) Distributed large-scale graph processing on FPGAs. in Journal of big data

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Fan H (2023) When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA

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Fan H (2023) High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point. in IEEE transactions on neural networks and learning systems

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Lecoeur B (2023) Accelerating 4D image reconstruction for magnetic resonance-guided radiotherapy in Physics and Imaging in Radiation Oncology

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Fan H (2022) Enabling fast uncertainty estimation

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Todman T (2022) Custom Instructions for Networked Processor Templates in IEEE Transactions on Circuits and Systems II: Express Briefs

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Wang Q (2022) Verifying Hardware Optimizations for Efficient Acceleration

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Fan H (2022) Accelerating Bayesian Neural Networks via Algorithmic and Hardware Optimizations in IEEE Transactions on Parallel and Distributed Systems

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Hongxiang F (2022) Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design

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Guo C (2022) Accelerating Constraint-Based Causal Discovery by Shifting Speed Bottleneck

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Vandebon V. (2022) Meta-Programming Design-Flow Patterns for Automating Reusable Optimisations

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Que Z (2022) Reconfigurable Acceleration of Graph Neural Networks for Jet Identification in Particle Physics

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Vandebon J (2022) Meta-Programming Design-Flow Patterns for Automating Reusable Optimisations

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Kwan B (2022) Applied Reconfigurable Computing. Architectures, Tools, and Applications - 18th International Symposium, ARC 2022, Virtual Event, September 19-20, 2022, Proceedings

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Wojcicki F (2022) Accelerating Transformer Neural Networks on FPGAs for High Energy Physics Experiments

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Fan H (2022) Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design

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Fan H (2022) Optimizing quantum circuit placement via machine learning

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Fan H (2022) FPGA-Based Acceleration for Bayesian Convolutional Neural Networks in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

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Fan H (2022) Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design

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Que Z (2022) Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks in ACM Transactions on Reconfigurable Technology and Systems

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Que Z (2022) LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics

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Que Z (2022) Optimizing Graph Neural Networks for Jet Tagging in Particle Physics on FPGAs

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Fan H (2022) Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator

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Wang Z (2022) Customizable FPGA-based Accelerator for Binarized Graph Neural Networks

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Rognlien M (2022) Applied Reconfigurable Computing. Architectures, Tools, and Applications - 18th International Symposium, ARC 2022, Virtual Event, September 19-20, 2022, Proceedings