Development of Type II Superlattice IR Detectors Monolithically Integrated on Silicon Substrates.

Lead Research Organisation: University College London
Department Name: Electronic and Electrical Engineering

Abstract

Background
The state-of-the-art CdHgTe (CMT) infrared photodetectors is currently dominating the market due to the near ideal optical properties for infrared sensing and well-established techniques. The current major challenges for CMT detectors are the very high cost and difficulty to obtain the required uniformity for long wavelengths. Moreover, the limited size of CdZnTe substrates widely used for growth of CMT detectors sets the upper limited of the pixel size of CMT focal plane arrays (FPA). Type II superlattice (T2SL) detectors have advantages such as lower leakage currents and greater uniformity than CMT detectors due to the advance in epitaxy growth techniques. In the type II structures, the InAs and GaSb layers can be engineered in a way that their thickness have opposite effect on the detection wavelength. Therefore, an improved tolerance to growth uncertainty and hence better uniformity can be expected from the type-II superlattice (T2SL). Despite a short history, T2SL detectors currently are approaching the performance of the state-of-the-art CMT detectors, which have been developed for over 50 years. Although T2SL photodetectors have shown great potential to be an important alternative to CMT detectors, GaSb substrates are either expensive or in limited size. The promise of long excess carrier lifetime and low leakage current is yet to be fulfilled. More importantly, similar to CMT, the FPA fabrication is very complex, consisting of over 50 individual steps, which increases the cost of T2SL FPAs. The development of T2SL detectors on Si substrates will greatly benefit from the mature Si-based IC technology. A single Si wafer can accommodate a number of large format FPAs. The possibility of monolithic integrating the read-out circuits and FPA on Si substrates also significantly reduces the fabrication cost.

3. Methodology
Molecular beam epitaxy (MBE) is used to direct growth III-V T2SLs on silicon wafers. MBE is able to manipulate the deposition of materials at accuracy of sub-atomic layer per second. New thin film growth techniques will be developed and implemented in the project for hetero-epitaxy of high quality III-V materials on silicon surfaces. The expected dislocation density in the epitaxial layers is on the order of 1.0E6 per cm2 in order to fabricate well-performed devices. Standard microfabrication will be involved in this project to develop high performance photodetectors on silicon wafers. Particularly, surface passivation of the devices will be carried out to minimise the surface leakage current pathways and to distinguish the impact of threading dislocations on dark current.

4. Objectives
The objective of this project is to develop monolithic integration of FPAs based type II superlattice photodetectors on Si substrates. It aims to address a few scientific and technical challenges, including maximizing the quantum efficiency of type II superlattice detectors, solving growth issues of III-V materials on Si substrates, and understanding the impact of strain-induced dislocations to the device performance.

5. Relevance to EPSRC's remits
The proposed project is closely relevant to the following EPSRC's Themes and Research Ares:
1) Energy: Sensors and Instrumentation; Solar Technology; Materials for Energy Applications.
2) Engineering: Sensors and Instrumentation; Materials for Energy Applications.
3) Physical sciences: Photonic Materials; Materials for Energy Applications.

Publications

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Studentship Projects

Project Reference Relationship Related To Start End Student Name
EP/P510683/1 01/10/2016 30/09/2021
1837222 Studentship EP/P510683/1 01/10/2016 31/08/2020 Claudia Gonzalez Burguete
 
Title Molecular Beam Epitaxy Machine 
Description The MBE machine creates tailor-made wafers by depositing thin-film crystal layers over the substrate in a single crystal layer based system. This is achieved by using pure elements like Gallium and Arsenic in conjunction with the ultra-high vacuum-based technique of the MBE. The MBE machine creates excellent wafers with good thickness control, sharp interfaces and negligible dopant distribution. 
Type Of Art Image 
Year Produced 2017 
Impact This image is part of my equipment photographic catalogue developed in conjunction with this project. The objective of this catalogue is to have a photographic representation of every equipment and every process use while developing this project in order to depict this during skills and knowledge transfer workshops. 
URL https://www.telegraph.co.uk/news/2018/02/12/engineering-physical-sciences-photography-competition-20...
 
Description the results shows that the growth on Si subtrate is viable and the results are closely matched to results associated with growth on GaAs substrate
Exploitation Route This project research was focused on comparing the performance of new InAs/GaSb T2SL architectures directly grown on Si and GaAs substrates. In order to achieve these results, the research focused on two experiments:
a) the comparison between the same T2SL photodiode grown on GaAs substrate and on Si substrate; and
b) the comparison between different T2SL photodiode grown on GaAs substrate.

Therefore, the future work should focus on two aspects:
a) in optimisation of Si growth technique, and
b) in developing new T2SL architectures by using unipolar barrier.

The aim of the optimisation is to increase the density of sensors built within one sample, as this project was focused on single pixel fabrication. The optimisation of the T2SL growth technique requires that the threading dislocation density must be reduced so it is important to further optimise the growth process. This requires direct growth on Si substrate was based on the construction of a superlattice buffer including a two-block breakout distribution and a thin nucleation layer. Therefore, the optimisation needs to be in the buffer because the T2SL structure is the same as the reference sample.

The aim of developing new structures is enhancing the device performance as depicted in this research, the more complex the T2SL structure the better dark current and quantum efficiency obtained. This could be achieved by developing new T2SL structures by using existing unipolar barriers used in bulk materials such as M-structure and N-structures, or by developing a completely new structures with the aim of direct growth on Si substrate. These architectures should focus only on the T2SL structure by standardising the rest of the architecture in order to isolate the performance of the T2SL structure.

Regardless of which approach to take, the overall aim of future work is developing an T2SL IR photodiode directly grown on Si substrate for the purpose of being used as a sensor within an IR camera. The objective is to experiment with different growth conditions such as temperature, thickness and alloys to create a T2SL with a better overall performance.

Based on this research project, Lancaster University has created their own version of T2SL IR photodetector directly grown on Si substrate by modifying mainly the buffer, as expected. The modification in the buffer included a thicker nucleation layer grown, a thicker buffer but still using the same two-block breakout distribution, and a new dislocation filter all grown at the same higher temperature. The InAs/InAsSb SL nBn structure was grown and the results obtained were a dark current density at 200K and 100mV is 1.4x10-2A/cm2, quantum efficiency at 200K is 25.6% and maximum specific detectivity of 3.65x1010 Jones (cmHz½/W), with cutoff wavelength (absorption edge) of ~5.5µm [30]. Therefore, this publication demonstrates that the contribution of this research towards direct growth on Si substrates can be used with different: alloy combinations, growth conditions and SL structures.

However, this research faced many disruptions due to closure of the MBE laboratory for a year of maintenance, to the closure of the cleanroom for a year of maintenance, and to intermittent closure of the PL laboratory for 18 months. This problem delayed the growth of the samples and thus having a cascaded effect until final fabrication.

The other problem associated with this research was the lack of equipment required to perform all the electrical and optical characterisation, which had to be done by Shanghai Tech University in China. This problem meant that the measurements were done at different stages of the research and therefore the measurements were different limiting the interpretation of the results.

Therefore, the best way to improve the results is to control the measurement by having access to all the equipment required over the entire project.
Sectors Electronics,Energy,Manufacturing, including Industrial Biotechology

 
Description The aim of this project was to develop a high performance mid-infrared T2SL photodetector monolithically grown on Si substrate as a low-cost alternative to the CMT detectors. The non-academic benefits are developed in collaboration with DSTL for potential military applications. This collaboration brings the expertise of T2SL photodetectors grown over Si subtrate which will lead to a wider deployment of IR techniques in the defence sector. These improvements will increase the performance of the infrared (IR) imaging systems for surveillance and reconnaisance missions giving DSTL significant technological advantages. The academic benefits associated with this research are various. Firstly, the development of new growth techniques capable of direct growth over Si substrate and GaAs substrate while finding the best T2SL structure. The architecture was optimised further in order to create an IR detector capable of monolithically integrated on Si-based technology. These new growth techniques are capable of constantly developing the active region strucutres achieving results closely to the state-of-the-art CMT detectors. Secondly, the association with DSTL can create further studentship projects with the opportunity to enhance this research in this field. This research could offer additional military applications for low-cost solution at near room temperature with acceptable performance. And finally, the results can have further benefits in other fields of study including the hetero-integration of CMT on Si substrate, and in other photonic technologies that allow integration with the mainstream integrated circuit (IC) technology. The significant impact of this project is attributed to being the first systematic investigation of the 6.1Å family of group III-V on IR technology associated with direct integration of readout integrated circuits (ROIC) based on the maturity of the Si-based IC technology. The Si-based fabrication technology and large substrate size can reduce further the costs associated per unit fabrication and enhance the performance by creating larger formats. The dissemination of this research was achieved during this research period with the publication of two articles as the first author, one research photography as competition winner, and five academic posters as the first author displayed only at UCL. In the future, the dissemination of these results will continue as a reference in other publications, as my paper has been cited 12 times in papers published by other researchers. As means of public engagement with DSTL by designing a poster and a presentation depicting all the results obtained during this research project.
First Year Of Impact 2018
Sector Digital/Communication/Information Technologies (including Software),Electronics,Energy,Security and Diplomacy
Impact Types Policy & public services

 
Description DSTLX-1000107901 
Organisation Defence Science & Technology Laboratory (DSTL)
Country United Kingdom 
Sector Public 
PI Contribution One article and three lecture posters
Collaborator Contribution The prototype style in the testing phase and DSTL has not have any time to test this. This is planned for end of this year and next year.
Impact 1. IET article - 2017 2. Barlow Lecture poster display - 2017 3. Mildner Memorial Lecture poster display - 2018 4. Research Graduate poster display - 2018
Start Year 2016
 
Description Barlow Lecture and research poster display 
Form Of Engagement Activity Participation in an activity, workshop or similar
Part Of Official Scheme? No
Geographic Reach Local
Primary Audience Professional Practitioners
Results and Impact Yearly poster exhibition to report the research progress, this occurs every two years in June.
Year(s) Of Engagement Activity 2017
URL http://discovery.ucl.ac.uk/10039597/